N- Channel MOSFET Small-Signal Darlington Pair based Low-Power Wide-Band Amplifier
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Abstract
N-channel identical MOSFETs based Small-Signal Darlington pair amplifiers under triple transistor topology are simulated at GPDK 180nm, 90nm, and 45nm process technologies in Cadence Virtuoso and Spectre simulation tool. At 180nm technology, amplifier amplifies 1uV-100mV range AC signal with voltage gain (11.656), current gain (105.971), bandwidth (39.4747 GHz), power consumption (25.6708 mW) and THD (0.000031 %). Similarly, at 90nm technology, amplifier is capable of amplifying 1 uV-2V ranging AC signal with voltage gain (1.02605), current gain (97.704), bandwidth (91.8932 GHz), power consumption (0.0038 uW) and THD (0.00000034%). However, at 45nm technology, amplifier produces voltage gain (0.0481), current gain (32.2163), higher cut-off frequency (691.367 Hz), power consumption (17.5314 mW) and THD (0.000000004%) with AC signal amplifying range 10 uV-1V. This work also addresses the narrow bandwidth issue of reference amplifier, PNP Sziklai pair amplifier, and poor response issue of proposed amplifier at 45nm technology at higher frequency. Proposed amplifiers are also implemented in Quadrupole topology to test the behavior of the amplifiers. Layout of the proposed amplifiers captures small-area of 2.8858 µm2 of (1.59 µm X 1.815 µm) dimensions and gives same pre and post layout results. Effect of w/l ratio, effect of CL, effect of different biasing parameters, small-signal AC analysis, temperature dependency and phase variations are among the few studies pursued for the proposed amplifiers. Frequency range suggests their possible application in high pass filter, wireless communication receivers and preamplifiers stages of ECG and seismographs.
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